Raspberry Pi /RP2040 /PIO0 /SM0_CLKDIV

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SM0_CLKDIV

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FRAC0INT

Description

Clock divider register for state machine 0 Frequency = clock freq / (CLKDIV_INT + CLKDIV_FRAC / 256)

Fields

FRAC

Fractional part of clock divider

INT

Effective frequency is sysclk/int. Value of 0 is interpreted as max possible value

Links

() ()